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Program 1: Array sum, loop, and stores

Program catalogue · Instruction reference · Executable reference

Purpose

Sum four words using a counted loop, then store results at word, byte, and halfword widths.

This is an instruction-behavior correctness fixture.

Setup

Property Value
Benchmark workload ID program-01
Headless selection --program 1
Visualizer scenario rv32i-program1
Registered test RV32ISingleCycleSystemTest/program-01
Instruction image 14 words, starting at 0x00000000; last word at 0x00000034
Initial state PC = 0x00000000; all registers zero; neither halted nor trapped
Memories Separate instruction and data memories, 256 KiB each; unlisted data bytes zero
Start address Bytes, in increasing address order
0x00000100 03 00 00 00
0x00000104 05 00 00 00
0x00000108 07 00 00 00
0x0000010C 0B 00 00 00

The table lists the complete preloaded data image, not instruction bytes. Data values use little-endian byte order.

Register Role established by the program
x1 Next input address
x2 Remaining word count, not a stack pointer
x3 Sum
x4 Loaded word
x5 Output base at 0x120
x6 Sum plus 0x34

The shared setup describes reset, loading, and the behavioral-core selection. These hand-written programs do not use the standard ABI stack.

Assembly

Every instruction word is shown, including words that a trap or branch may prevent from executing. Address and word comments identify the exact fixture image.

addi x1, x0, 0x100             # 0x00000000 | 0x10000093
addi x2, x0, 4                 # 0x00000004 | 0x00400113
addi x3, x0, 0                 # 0x00000008 | 0x00000193
loop:
lw x4, 0(x1)                   # 0x0000000C | 0x0000A203
add x3, x3, x4                 # 0x00000010 | 0x004181B3
addi x1, x1, 4                 # 0x00000014 | 0x00408093
addi x2, x2, -1                # 0x00000018 | 0xFFF10113
bne x2, x0, loop               # 0x0000001C | 0xFE0118E3
addi x5, x0, 0x120             # 0x00000020 | 0x12000293
sw x3, 0(x5)                   # 0x00000024 | 0x0032A023
sb x3, 4(x5)                   # 0x00000028 | 0x00328223
addi x6, x3, 52                # 0x0000002C | 0x03418313
sh x6, 6(x5)                   # 0x00000030 | 0x00629323
ebreak                         # 0x00000034 | 0x00100073

Execution

  1. 0x00–0x08 initialize the source pointer, count, and sum.
  2. Each pass through 0x0C–0x1C loads one word, adds it to x3, advances the pointer by four bytes, and decrements the count. BNE returns to loop while the count is nonzero.
  3. After the fourth pass, the branch falls through to 0x20. The program writes the sum at 0x120, its low byte at 0x124, and the low halfword of sum + 0x34 at 0x126.
  4. EBREAK at 0x34 halts without advancing PC.

The loop state after each BNE makes the accumulated result explicit:

Checkpoint Loaded word x1 x2 x3 Next PC
I7 3 0x104 3 3 0x0C
I12 5 0x108 2 8 0x0C
I17 7 0x10C 1 15 0x0C
I22 11 0x110 0 26 0x20

The total is 29 attempts: three setup instructions, four passes of five instructions, and six final instructions including EBREAK. The halfword result is 26 + 0x34 = 78; it is not a multiplication.

Expected result

These are the fixture's explicit final-state assertions. Unlisted registers are not implicitly zero; their values follow the assembly. The store table enumerates every written byte, including zero-valued writes.

Item Expected value Meaning
x1 0x00000110 Next input address
x2 0x00000000 Remaining word count, not a stack pointer
x3 0x0000001A Sum
x5 0x00000120 Output base at 0x120
x6 0x0000004E Sum plus 0x34
PC 0x00000034 EBREAK address
Attempts 29 Checkpoints I0–I28
HALTED 1 Project halt
TRAPPED 0 No exception
TRAP_CAUSE 0 None, a project enum code
Start address Bytes, in increasing address order
0x00000120 1A 00 00 00
0x00000124 1A
0x00000126 4E 00

All data bytes not listed as written retain their initial values. The input words are 3, 5, 7, and 11. The halfword output is 26 + 0x34 = 78. Byte 0x125 is never written.

Simulation and checkpoints

For a headless functional check, run build/rv32i_experiment --core single --program 1 --period 4000 --max-cycles 4096 --allocation-limit-mib 512. Select baseline or advanced for the same fixture on another core; add --fidelity reference for the structural-datapath reference profile. The explicit period is a scheduling choice, not a performance result. Use the campaign procedure for clock-certified measurements.

All 29 instruction attempts are included, with absolute simulator time and checkpoint number. The terminating EBREAK is included. The table is scrollable in both directions. Observation conventions distinguish these attempts from loaded word addresses and hardware cycles.

All 29 instruction-attempt checkpoints of RV32ISingleCycleSystemTest/program-01, with a behavioral core. Times are absolute simulator units, not milliseconds or an ISA latency.

CheckpointTimeInstruction / addressExpected architectural effects
I07080ADDI @ 0x00000000raw=0x10000093, pc_after=0x00000004, wb=x1=0x00000100, mem=None, flow=next
I111080ADDI @ 0x00000004raw=0x00400113, pc_after=0x00000008, wb=x2=0x00000004, mem=None, flow=next
I215080ADDI @ 0x00000008raw=0x00000193, pc_after=0x0000000c, wb=x3=0x00000000, mem=None, flow=next
I319080LW @ 0x0000000craw=0x0000a203, pc_after=0x00000010, wb=x4=0x00000003, mem=Read Word @0x00000100 -> 0x00000003, flow=next
I423080ADD @ 0x00000010raw=0x004181b3, pc_after=0x00000014, wb=x3=0x00000003, mem=None, flow=next
I527080ADDI @ 0x00000014raw=0x00408093, pc_after=0x00000018, wb=x1=0x00000104, mem=None, flow=next
I631080ADDI @ 0x00000018raw=0xfff10113, pc_after=0x0000001c, wb=x2=0x00000003, mem=None, flow=next
I735080BNE @ 0x0000001craw=0xfe0118e3, pc_after=0x0000000c, wb=None, mem=None, branch=BNE taken=true
I839080LW @ 0x0000000craw=0x0000a203, pc_after=0x00000010, wb=x4=0x00000005, mem=Read Word @0x00000104 -> 0x00000005, flow=next
I943080ADD @ 0x00000010raw=0x004181b3, pc_after=0x00000014, wb=x3=0x00000008, mem=None, flow=next
I1047080ADDI @ 0x00000014raw=0x00408093, pc_after=0x00000018, wb=x1=0x00000108, mem=None, flow=next
I1151080ADDI @ 0x00000018raw=0xfff10113, pc_after=0x0000001c, wb=x2=0x00000002, mem=None, flow=next
I1255080BNE @ 0x0000001craw=0xfe0118e3, pc_after=0x0000000c, wb=None, mem=None, branch=BNE taken=true
I1359080LW @ 0x0000000craw=0x0000a203, pc_after=0x00000010, wb=x4=0x00000007, mem=Read Word @0x00000108 -> 0x00000007, flow=next
I1463080ADD @ 0x00000010raw=0x004181b3, pc_after=0x00000014, wb=x3=0x0000000f, mem=None, flow=next
I1567080ADDI @ 0x00000014raw=0x00408093, pc_after=0x00000018, wb=x1=0x0000010c, mem=None, flow=next
I1671080ADDI @ 0x00000018raw=0xfff10113, pc_after=0x0000001c, wb=x2=0x00000001, mem=None, flow=next
I1775080BNE @ 0x0000001craw=0xfe0118e3, pc_after=0x0000000c, wb=None, mem=None, branch=BNE taken=true
I1879080LW @ 0x0000000craw=0x0000a203, pc_after=0x00000010, wb=x4=0x0000000b, mem=Read Word @0x0000010c -> 0x0000000b, flow=next
I1983080ADD @ 0x00000010raw=0x004181b3, pc_after=0x00000014, wb=x3=0x0000001a, mem=None, flow=next
I2087080ADDI @ 0x00000014raw=0x00408093, pc_after=0x00000018, wb=x1=0x00000110, mem=None, flow=next
I2191080ADDI @ 0x00000018raw=0xfff10113, pc_after=0x0000001c, wb=x2=0x00000000, mem=None, flow=next
I2295080BNE @ 0x0000001craw=0xfe0118e3, pc_after=0x00000020, wb=None, mem=None, branch=BNE taken=false
I2399080ADDI @ 0x00000020raw=0x12000293, pc_after=0x00000024, wb=x5=0x00000120, mem=None, flow=next
I24103080SW @ 0x00000024raw=0x0032a023, pc_after=0x00000028, wb=None, mem=Write Word @0x00000120 <- 0x0000001a, flow=next
I25107080SB @ 0x00000028raw=0x00328223, pc_after=0x0000002c, wb=None, mem=Write Byte @0x00000124 <- 0x0000001a, flow=next
I26111080ADDI @ 0x0000002craw=0x03418313, pc_after=0x00000030, wb=x6=0x0000004e, mem=None, flow=next
I27115080SH @ 0x00000030raw=0x00629323, pc_after=0x00000034, wb=None, mem=Write Halfword @0x00000126 <- 0x0000004e, flow=next
I28119080EBREAK @ 0x00000034raw=0x00100073, pc_after=0x00000034, wb=None, mem=None, flow=next, halted=true

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