Program 19: Repeated load-use pairs¶
Program catalogue · Instruction reference · Executable reference
Purpose¶
Provide an unrolled sequence where each arithmetic instruction immediately consumes a loaded value.
This is one of the six workload fixtures. This page specifies its instructions and architectural result; pipeline cycles, stalls, and throughput are implementation-specific and are not established by this reference run.
Setup¶
| Property | Value |
|---|---|
| Benchmark workload ID | program-19 |
| Headless selection | --program 19 |
| Visualizer scenario | rv32i-program19 |
| Registered test | RV32ISingleCycleSystemTest/program-19 |
| Instruction image | 67 words, starting at 0x00000000; last word at 0x00000108 |
| Initial state | PC = 0x00000000; all registers zero; neither halted nor trapped |
| Memories | Separate instruction and data memories, 256 KiB each; unlisted data bytes zero |
| Start address | Bytes, in increasing address order |
|---|---|
0x00000100 |
07 00 00 00 |
The table lists the complete preloaded data image, not instruction bytes. Data values use little-endian byte order.
| Register | Role established by the program |
|---|---|
x1 |
Fixed source address 0x100 |
x2 |
Loaded word, always 7 |
x3 |
Accumulator |
The shared setup describes reset, loading, and the behavioral-core selection. These hand-written programs do not use the standard ABI stack.
Assembly¶
Every instruction word is shown, including words that a trap or branch may prevent from executing. Address and word comments identify the exact fixture image. The repeated blocks are fully expanded; there are no omitted instructions or runtime loop directives.
addi x1, x0, 0x100 # 0x00000000 | 0x10000093
addi x3, x0, 0 # 0x00000004 | 0x00000193
lw x2, 0(x1) # 0x00000008 | 0x0000A103
add x3, x3, x2 # 0x0000000C | 0x002181B3
lw x2, 0(x1) # 0x00000010 | 0x0000A103
add x3, x3, x2 # 0x00000014 | 0x002181B3
lw x2, 0(x1) # 0x00000018 | 0x0000A103
add x3, x3, x2 # 0x0000001C | 0x002181B3
lw x2, 0(x1) # 0x00000020 | 0x0000A103
add x3, x3, x2 # 0x00000024 | 0x002181B3
lw x2, 0(x1) # 0x00000028 | 0x0000A103
add x3, x3, x2 # 0x0000002C | 0x002181B3
lw x2, 0(x1) # 0x00000030 | 0x0000A103
add x3, x3, x2 # 0x00000034 | 0x002181B3
lw x2, 0(x1) # 0x00000038 | 0x0000A103
add x3, x3, x2 # 0x0000003C | 0x002181B3
lw x2, 0(x1) # 0x00000040 | 0x0000A103
add x3, x3, x2 # 0x00000044 | 0x002181B3
lw x2, 0(x1) # 0x00000048 | 0x0000A103
add x3, x3, x2 # 0x0000004C | 0x002181B3
lw x2, 0(x1) # 0x00000050 | 0x0000A103
add x3, x3, x2 # 0x00000054 | 0x002181B3
lw x2, 0(x1) # 0x00000058 | 0x0000A103
add x3, x3, x2 # 0x0000005C | 0x002181B3
lw x2, 0(x1) # 0x00000060 | 0x0000A103
add x3, x3, x2 # 0x00000064 | 0x002181B3
lw x2, 0(x1) # 0x00000068 | 0x0000A103
add x3, x3, x2 # 0x0000006C | 0x002181B3
lw x2, 0(x1) # 0x00000070 | 0x0000A103
add x3, x3, x2 # 0x00000074 | 0x002181B3
lw x2, 0(x1) # 0x00000078 | 0x0000A103
add x3, x3, x2 # 0x0000007C | 0x002181B3
lw x2, 0(x1) # 0x00000080 | 0x0000A103
add x3, x3, x2 # 0x00000084 | 0x002181B3
lw x2, 0(x1) # 0x00000088 | 0x0000A103
add x3, x3, x2 # 0x0000008C | 0x002181B3
lw x2, 0(x1) # 0x00000090 | 0x0000A103
add x3, x3, x2 # 0x00000094 | 0x002181B3
lw x2, 0(x1) # 0x00000098 | 0x0000A103
add x3, x3, x2 # 0x0000009C | 0x002181B3
lw x2, 0(x1) # 0x000000A0 | 0x0000A103
add x3, x3, x2 # 0x000000A4 | 0x002181B3
lw x2, 0(x1) # 0x000000A8 | 0x0000A103
add x3, x3, x2 # 0x000000AC | 0x002181B3
lw x2, 0(x1) # 0x000000B0 | 0x0000A103
add x3, x3, x2 # 0x000000B4 | 0x002181B3
lw x2, 0(x1) # 0x000000B8 | 0x0000A103
add x3, x3, x2 # 0x000000BC | 0x002181B3
lw x2, 0(x1) # 0x000000C0 | 0x0000A103
add x3, x3, x2 # 0x000000C4 | 0x002181B3
lw x2, 0(x1) # 0x000000C8 | 0x0000A103
add x3, x3, x2 # 0x000000CC | 0x002181B3
lw x2, 0(x1) # 0x000000D0 | 0x0000A103
add x3, x3, x2 # 0x000000D4 | 0x002181B3
lw x2, 0(x1) # 0x000000D8 | 0x0000A103
add x3, x3, x2 # 0x000000DC | 0x002181B3
lw x2, 0(x1) # 0x000000E0 | 0x0000A103
add x3, x3, x2 # 0x000000E4 | 0x002181B3
lw x2, 0(x1) # 0x000000E8 | 0x0000A103
add x3, x3, x2 # 0x000000EC | 0x002181B3
lw x2, 0(x1) # 0x000000F0 | 0x0000A103
add x3, x3, x2 # 0x000000F4 | 0x002181B3
lw x2, 0(x1) # 0x000000F8 | 0x0000A103
add x3, x3, x2 # 0x000000FC | 0x002181B3
lw x2, 0(x1) # 0x00000100 | 0x0000A103
add x3, x3, x2 # 0x00000104 | 0x002181B3
ebreak # 0x00000108 | 0x00100073
Execution¶
- Set the pointer to
0x100and the accumulator to zero. Data word0x00000007is preloaded at that address. - Execute 32 unrolled LW/ADD pairs. Each LW rereads the same address; its following ADD adds 7 to
x3. - The total is
32 × 7 = 224, with2 + 32 × 2 + 1 = 67attempts including EBREAK.
There are no branch instructions or pointer updates, so this isolates the load-to-consumer pattern from loop control. Instruction and data addresses can overlap numerically because the fixture uses separate memories.
Expected result¶
These are the fixture's explicit final-state assertions. Unlisted registers are not implicitly zero; their values follow the assembly. The store table enumerates every written byte, including zero-valued writes.
| Item | Expected value | Meaning |
|---|---|---|
x1 |
0x00000100 |
Fixed source address 0x100 |
x2 |
0x00000007 |
Loaded word, always 7 |
x3 |
0x000000E0 |
Accumulator |
PC |
0x00000108 |
EBREAK address |
Attempts |
67 | Checkpoints I0–I66 |
HALTED |
1 | Project halt |
TRAPPED |
0 | No exception |
TRAP_CAUSE |
0 | None, a project enum code |
| Start address | Bytes, in increasing address order |
|---|---|
| None | — |
No data writes occur; the initial data image is unchanged. Data memory is read but never written. The page documents the workload, not a fixed number of load-use stall cycles.
Simulation and checkpoints¶
For a headless functional check, run build/rv32i_experiment --core single --program 19 --period 4000 --max-cycles 4096 --allocation-limit-mib 512. Select baseline or advanced for the same fixture on another core; add --fidelity reference for the structural-datapath reference profile. The explicit period is a scheduling choice, not a performance result. Use the campaign procedure for clock-certified measurements.
All 67 instruction attempts are included, with absolute simulator time and checkpoint number. The terminating EBREAK is included. The table is scrollable in both directions. Observation conventions distinguish these attempts from loaded word addresses and hardware cycles.
All 67 instruction-attempt checkpoints of RV32ISingleCycleSystemTest/program-19, with a behavioral core. Times are absolute simulator units, not milliseconds or an ISA latency.
| Checkpoint | Time | Instruction / address | Expected architectural effects |
|---|---|---|---|
| I0 | 7080 | ADDI @ 0x00000000 | raw=0x10000093, pc_after=0x00000004, wb=x1=0x00000100, mem=None, flow=next |
| I1 | 11080 | ADDI @ 0x00000004 | raw=0x00000193, pc_after=0x00000008, wb=x3=0x00000000, mem=None, flow=next |
| I2 | 15080 | LW @ 0x00000008 | raw=0x0000a103, pc_after=0x0000000c, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I3 | 19080 | ADD @ 0x0000000c | raw=0x002181b3, pc_after=0x00000010, wb=x3=0x00000007, mem=None, flow=next |
| I4 | 23080 | LW @ 0x00000010 | raw=0x0000a103, pc_after=0x00000014, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I5 | 27080 | ADD @ 0x00000014 | raw=0x002181b3, pc_after=0x00000018, wb=x3=0x0000000e, mem=None, flow=next |
| I6 | 31080 | LW @ 0x00000018 | raw=0x0000a103, pc_after=0x0000001c, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I7 | 35080 | ADD @ 0x0000001c | raw=0x002181b3, pc_after=0x00000020, wb=x3=0x00000015, mem=None, flow=next |
| I8 | 39080 | LW @ 0x00000020 | raw=0x0000a103, pc_after=0x00000024, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I9 | 43080 | ADD @ 0x00000024 | raw=0x002181b3, pc_after=0x00000028, wb=x3=0x0000001c, mem=None, flow=next |
| I10 | 47080 | LW @ 0x00000028 | raw=0x0000a103, pc_after=0x0000002c, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I11 | 51080 | ADD @ 0x0000002c | raw=0x002181b3, pc_after=0x00000030, wb=x3=0x00000023, mem=None, flow=next |
| I12 | 55080 | LW @ 0x00000030 | raw=0x0000a103, pc_after=0x00000034, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I13 | 59080 | ADD @ 0x00000034 | raw=0x002181b3, pc_after=0x00000038, wb=x3=0x0000002a, mem=None, flow=next |
| I14 | 63080 | LW @ 0x00000038 | raw=0x0000a103, pc_after=0x0000003c, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I15 | 67080 | ADD @ 0x0000003c | raw=0x002181b3, pc_after=0x00000040, wb=x3=0x00000031, mem=None, flow=next |
| I16 | 71080 | LW @ 0x00000040 | raw=0x0000a103, pc_after=0x00000044, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I17 | 75080 | ADD @ 0x00000044 | raw=0x002181b3, pc_after=0x00000048, wb=x3=0x00000038, mem=None, flow=next |
| I18 | 79080 | LW @ 0x00000048 | raw=0x0000a103, pc_after=0x0000004c, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I19 | 83080 | ADD @ 0x0000004c | raw=0x002181b3, pc_after=0x00000050, wb=x3=0x0000003f, mem=None, flow=next |
| I20 | 87080 | LW @ 0x00000050 | raw=0x0000a103, pc_after=0x00000054, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I21 | 91080 | ADD @ 0x00000054 | raw=0x002181b3, pc_after=0x00000058, wb=x3=0x00000046, mem=None, flow=next |
| I22 | 95080 | LW @ 0x00000058 | raw=0x0000a103, pc_after=0x0000005c, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I23 | 99080 | ADD @ 0x0000005c | raw=0x002181b3, pc_after=0x00000060, wb=x3=0x0000004d, mem=None, flow=next |
| I24 | 103080 | LW @ 0x00000060 | raw=0x0000a103, pc_after=0x00000064, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I25 | 107080 | ADD @ 0x00000064 | raw=0x002181b3, pc_after=0x00000068, wb=x3=0x00000054, mem=None, flow=next |
| I26 | 111080 | LW @ 0x00000068 | raw=0x0000a103, pc_after=0x0000006c, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I27 | 115080 | ADD @ 0x0000006c | raw=0x002181b3, pc_after=0x00000070, wb=x3=0x0000005b, mem=None, flow=next |
| I28 | 119080 | LW @ 0x00000070 | raw=0x0000a103, pc_after=0x00000074, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I29 | 123080 | ADD @ 0x00000074 | raw=0x002181b3, pc_after=0x00000078, wb=x3=0x00000062, mem=None, flow=next |
| I30 | 127080 | LW @ 0x00000078 | raw=0x0000a103, pc_after=0x0000007c, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I31 | 131080 | ADD @ 0x0000007c | raw=0x002181b3, pc_after=0x00000080, wb=x3=0x00000069, mem=None, flow=next |
| I32 | 135080 | LW @ 0x00000080 | raw=0x0000a103, pc_after=0x00000084, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I33 | 139080 | ADD @ 0x00000084 | raw=0x002181b3, pc_after=0x00000088, wb=x3=0x00000070, mem=None, flow=next |
| I34 | 143080 | LW @ 0x00000088 | raw=0x0000a103, pc_after=0x0000008c, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I35 | 147080 | ADD @ 0x0000008c | raw=0x002181b3, pc_after=0x00000090, wb=x3=0x00000077, mem=None, flow=next |
| I36 | 151080 | LW @ 0x00000090 | raw=0x0000a103, pc_after=0x00000094, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I37 | 155080 | ADD @ 0x00000094 | raw=0x002181b3, pc_after=0x00000098, wb=x3=0x0000007e, mem=None, flow=next |
| I38 | 159080 | LW @ 0x00000098 | raw=0x0000a103, pc_after=0x0000009c, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I39 | 163080 | ADD @ 0x0000009c | raw=0x002181b3, pc_after=0x000000a0, wb=x3=0x00000085, mem=None, flow=next |
| I40 | 167080 | LW @ 0x000000a0 | raw=0x0000a103, pc_after=0x000000a4, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I41 | 171080 | ADD @ 0x000000a4 | raw=0x002181b3, pc_after=0x000000a8, wb=x3=0x0000008c, mem=None, flow=next |
| I42 | 175080 | LW @ 0x000000a8 | raw=0x0000a103, pc_after=0x000000ac, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I43 | 179080 | ADD @ 0x000000ac | raw=0x002181b3, pc_after=0x000000b0, wb=x3=0x00000093, mem=None, flow=next |
| I44 | 183080 | LW @ 0x000000b0 | raw=0x0000a103, pc_after=0x000000b4, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I45 | 187080 | ADD @ 0x000000b4 | raw=0x002181b3, pc_after=0x000000b8, wb=x3=0x0000009a, mem=None, flow=next |
| I46 | 191080 | LW @ 0x000000b8 | raw=0x0000a103, pc_after=0x000000bc, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I47 | 195080 | ADD @ 0x000000bc | raw=0x002181b3, pc_after=0x000000c0, wb=x3=0x000000a1, mem=None, flow=next |
| I48 | 199080 | LW @ 0x000000c0 | raw=0x0000a103, pc_after=0x000000c4, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I49 | 203080 | ADD @ 0x000000c4 | raw=0x002181b3, pc_after=0x000000c8, wb=x3=0x000000a8, mem=None, flow=next |
| I50 | 207080 | LW @ 0x000000c8 | raw=0x0000a103, pc_after=0x000000cc, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I51 | 211080 | ADD @ 0x000000cc | raw=0x002181b3, pc_after=0x000000d0, wb=x3=0x000000af, mem=None, flow=next |
| I52 | 215080 | LW @ 0x000000d0 | raw=0x0000a103, pc_after=0x000000d4, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I53 | 219080 | ADD @ 0x000000d4 | raw=0x002181b3, pc_after=0x000000d8, wb=x3=0x000000b6, mem=None, flow=next |
| I54 | 223080 | LW @ 0x000000d8 | raw=0x0000a103, pc_after=0x000000dc, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I55 | 227080 | ADD @ 0x000000dc | raw=0x002181b3, pc_after=0x000000e0, wb=x3=0x000000bd, mem=None, flow=next |
| I56 | 231080 | LW @ 0x000000e0 | raw=0x0000a103, pc_after=0x000000e4, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I57 | 235080 | ADD @ 0x000000e4 | raw=0x002181b3, pc_after=0x000000e8, wb=x3=0x000000c4, mem=None, flow=next |
| I58 | 239080 | LW @ 0x000000e8 | raw=0x0000a103, pc_after=0x000000ec, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I59 | 243080 | ADD @ 0x000000ec | raw=0x002181b3, pc_after=0x000000f0, wb=x3=0x000000cb, mem=None, flow=next |
| I60 | 247080 | LW @ 0x000000f0 | raw=0x0000a103, pc_after=0x000000f4, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I61 | 251080 | ADD @ 0x000000f4 | raw=0x002181b3, pc_after=0x000000f8, wb=x3=0x000000d2, mem=None, flow=next |
| I62 | 255080 | LW @ 0x000000f8 | raw=0x0000a103, pc_after=0x000000fc, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I63 | 259080 | ADD @ 0x000000fc | raw=0x002181b3, pc_after=0x00000100, wb=x3=0x000000d9, mem=None, flow=next |
| I64 | 263080 | LW @ 0x00000100 | raw=0x0000a103, pc_after=0x00000104, wb=x2=0x00000007, mem=Read Word @0x00000100 -> 0x00000007, flow=next |
| I65 | 267080 | ADD @ 0x00000104 | raw=0x002181b3, pc_after=0x00000108, wb=x3=0x000000e0, mem=None, flow=next |
| I66 | 271080 | EBREAK @ 0x00000108 | raw=0x00100073, pc_after=0x00000108, wb=None, mem=None, flow=next, halted=true |