Program 8: Byte copy and checksum

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Purpose

Copy five bytes and compute an unsigned-byte checksum, then store the checksum as a word.

This is an instruction-behavior correctness fixture.

Setup

Property	Value
Benchmark workload ID	program-08
Headless selection	--program 8
Visualizer scenario	rv32i-program8
Registered test	RV32ISingleCycleSystemTest/program-08
Instruction image	14 words, starting at 0x00000000; last word at 0x00000034
Initial state	PC = 0x00000000; all registers zero; neither halted nor trapped
Memories	Separate instruction and data memories, 256 KiB each; unlisted data bytes zero

Start address	Bytes, in increasing address order
0x00000100	01 02 03 04
0x00000104	FF

The table lists the complete preloaded data image, not instruction bytes. Data values use little-endian byte order.

Register	Role established by the program
x1	Next source byte
x2	Next destination byte
x3	Remaining byte count
x4	Checksum
x5	Loaded unsigned byte
x6	Checksum output address 0x160

The shared setup describes reset, loading, and the behavioral-core selection. These hand-written programs do not use the standard ABI stack.

Assembly

Every instruction word is shown, including words that a trap or branch may prevent from executing. Address and word comments identify the exact fixture image.

addi x1, x0, 0x100             # 0x00000000 | 0x10000093
addi x2, x0, 0x140             # 0x00000004 | 0x14000113
addi x3, x0, 5                 # 0x00000008 | 0x00500193
addi x4, x0, 0                 # 0x0000000C | 0x00000213
copy_loop:
lbu x5, 0(x1)                  # 0x00000010 | 0x0000C283
sb x5, 0(x2)                   # 0x00000014 | 0x00510023
add x4, x4, x5                 # 0x00000018 | 0x00520233
addi x1, x1, 1                 # 0x0000001C | 0x00108093
addi x2, x2, 1                 # 0x00000020 | 0x00110113
addi x3, x3, -1                # 0x00000024 | 0xFFF18193
bne x3, x0, copy_loop          # 0x00000028 | 0xFE0194E3
addi x6, x0, 0x160             # 0x0000002C | 0x16000313
sw x4, 0(x6)                   # 0x00000030 | 0x00432023
ebreak                         # 0x00000034 | 0x00100073

Execution

1. Initialize source 0x100, destination 0x140, count five, and checksum zero.
2. Each iteration uses LBU to read one byte, SB to copy it, and ADD to include its unsigned value in the checksum. Both pointers advance by one byte.
3. The final input byte is 0xFF. LBU contributes 255, not -1; the checksum is 1 + 2 + 3 + 4 + 255 = 265 = 0x109.
4. After five iterations, store the checksum at 0x160 and halt. The total is 4 + 5 × 7 + 3 = 42 attempts.

Expected result

These are the fixture's explicit final-state assertions. Unlisted registers are not implicitly zero; their values follow the assembly. The store table enumerates every written byte, including zero-valued writes.

Item	Expected value	Meaning
x1	0x00000105	Next source byte
x2	0x00000145	Next destination byte
x3	0x00000000	Remaining byte count
x4	0x00000109	Checksum
PC	0x00000034	EBREAK address
Attempts	42	Checkpoints I0–I41
HALTED	1	Project halt
TRAPPED	0	No exception
TRAP_CAUSE	0	None, a project enum code

Start address	Bytes, in increasing address order
0x00000140	01 02 03 04
0x00000144	FF
0x00000160	09 01 00 00

All data bytes not listed as written retain their initial values. The destination bytes are 01 02 03 04 FF; the checksum is the little-endian word 0x00000109.

Simulation and checkpoints

For a headless functional check, run build/rv32i_experiment --core single --program 8 --period 4000 --max-cycles 4096 --allocation-limit-mib 512. Select baseline or advanced for the same fixture on another core; add --fidelity reference for the structural-datapath reference profile. The explicit period is a scheduling choice, not a performance result. Use the campaign procedure for clock-certified measurements.

All 42 instruction attempts are included, with absolute simulator time and checkpoint number. The terminating EBREAK is included. The table is scrollable in both directions. Observation conventions distinguish these attempts from loaded word addresses and hardware cycles.

All 42 instruction-attempt checkpoints of RV32ISingleCycleSystemTest/program-08, with a behavioral core. Times are absolute simulator units, not milliseconds or an ISA latency.

Checkpoint	Time	Instruction / address	Expected architectural effects
I0	7080	ADDI @ 0x00000000	raw=0x10000093, pc_after=0x00000004, wb=x1=0x00000100, mem=None, flow=next
I1	11080	ADDI @ 0x00000004	raw=0x14000113, pc_after=0x00000008, wb=x2=0x00000140, mem=None, flow=next
I2	15080	ADDI @ 0x00000008	raw=0x00500193, pc_after=0x0000000c, wb=x3=0x00000005, mem=None, flow=next
I3	19080	ADDI @ 0x0000000c	raw=0x00000213, pc_after=0x00000010, wb=x4=0x00000000, mem=None, flow=next
I4	23080	LBU @ 0x00000010	raw=0x0000c283, pc_after=0x00000014, wb=x5=0x00000001, mem=Read Byte @0x00000100 -> 0x00000001, flow=next
I5	27080	SB @ 0x00000014	raw=0x00510023, pc_after=0x00000018, wb=None, mem=Write Byte @0x00000140 <- 0x00000001, flow=next
I6	31080	ADD @ 0x00000018	raw=0x00520233, pc_after=0x0000001c, wb=x4=0x00000001, mem=None, flow=next
I7	35080	ADDI @ 0x0000001c	raw=0x00108093, pc_after=0x00000020, wb=x1=0x00000101, mem=None, flow=next
I8	39080	ADDI @ 0x00000020	raw=0x00110113, pc_after=0x00000024, wb=x2=0x00000141, mem=None, flow=next
I9	43080	ADDI @ 0x00000024	raw=0xfff18193, pc_after=0x00000028, wb=x3=0x00000004, mem=None, flow=next
I10	47080	BNE @ 0x00000028	raw=0xfe0194e3, pc_after=0x00000010, wb=None, mem=None, branch=BNE taken=true
I11	51080	LBU @ 0x00000010	raw=0x0000c283, pc_after=0x00000014, wb=x5=0x00000002, mem=Read Byte @0x00000101 -> 0x00000002, flow=next
I12	55080	SB @ 0x00000014	raw=0x00510023, pc_after=0x00000018, wb=None, mem=Write Byte @0x00000141 <- 0x00000002, flow=next
I13	59080	ADD @ 0x00000018	raw=0x00520233, pc_after=0x0000001c, wb=x4=0x00000003, mem=None, flow=next
I14	63080	ADDI @ 0x0000001c	raw=0x00108093, pc_after=0x00000020, wb=x1=0x00000102, mem=None, flow=next
I15	67080	ADDI @ 0x00000020	raw=0x00110113, pc_after=0x00000024, wb=x2=0x00000142, mem=None, flow=next
I16	71080	ADDI @ 0x00000024	raw=0xfff18193, pc_after=0x00000028, wb=x3=0x00000003, mem=None, flow=next
I17	75080	BNE @ 0x00000028	raw=0xfe0194e3, pc_after=0x00000010, wb=None, mem=None, branch=BNE taken=true
I18	79080	LBU @ 0x00000010	raw=0x0000c283, pc_after=0x00000014, wb=x5=0x00000003, mem=Read Byte @0x00000102 -> 0x00000003, flow=next
I19	83080	SB @ 0x00000014	raw=0x00510023, pc_after=0x00000018, wb=None, mem=Write Byte @0x00000142 <- 0x00000003, flow=next
I20	87080	ADD @ 0x00000018	raw=0x00520233, pc_after=0x0000001c, wb=x4=0x00000006, mem=None, flow=next
I21	91080	ADDI @ 0x0000001c	raw=0x00108093, pc_after=0x00000020, wb=x1=0x00000103, mem=None, flow=next
I22	95080	ADDI @ 0x00000020	raw=0x00110113, pc_after=0x00000024, wb=x2=0x00000143, mem=None, flow=next
I23	99080	ADDI @ 0x00000024	raw=0xfff18193, pc_after=0x00000028, wb=x3=0x00000002, mem=None, flow=next
I24	103080	BNE @ 0x00000028	raw=0xfe0194e3, pc_after=0x00000010, wb=None, mem=None, branch=BNE taken=true
I25	107080	LBU @ 0x00000010	raw=0x0000c283, pc_after=0x00000014, wb=x5=0x00000004, mem=Read Byte @0x00000103 -> 0x00000004, flow=next
I26	111080	SB @ 0x00000014	raw=0x00510023, pc_after=0x00000018, wb=None, mem=Write Byte @0x00000143 <- 0x00000004, flow=next
I27	115080	ADD @ 0x00000018	raw=0x00520233, pc_after=0x0000001c, wb=x4=0x0000000a, mem=None, flow=next
I28	119080	ADDI @ 0x0000001c	raw=0x00108093, pc_after=0x00000020, wb=x1=0x00000104, mem=None, flow=next
I29	123080	ADDI @ 0x00000020	raw=0x00110113, pc_after=0x00000024, wb=x2=0x00000144, mem=None, flow=next
I30	127080	ADDI @ 0x00000024	raw=0xfff18193, pc_after=0x00000028, wb=x3=0x00000001, mem=None, flow=next
I31	131080	BNE @ 0x00000028	raw=0xfe0194e3, pc_after=0x00000010, wb=None, mem=None, branch=BNE taken=true
I32	135080	LBU @ 0x00000010	raw=0x0000c283, pc_after=0x00000014, wb=x5=0x000000ff, mem=Read Byte @0x00000104 -> 0x000000ff, flow=next
I33	139080	SB @ 0x00000014	raw=0x00510023, pc_after=0x00000018, wb=None, mem=Write Byte @0x00000144 <- 0x000000ff, flow=next
I34	143080	ADD @ 0x00000018	raw=0x00520233, pc_after=0x0000001c, wb=x4=0x00000109, mem=None, flow=next
I35	147080	ADDI @ 0x0000001c	raw=0x00108093, pc_after=0x00000020, wb=x1=0x00000105, mem=None, flow=next
I36	151080	ADDI @ 0x00000020	raw=0x00110113, pc_after=0x00000024, wb=x2=0x00000145, mem=None, flow=next
I37	155080	ADDI @ 0x00000024	raw=0xfff18193, pc_after=0x00000028, wb=x3=0x00000000, mem=None, flow=next
I38	159080	BNE @ 0x00000028	raw=0xfe0194e3, pc_after=0x0000002c, wb=None, mem=None, branch=BNE taken=false
I39	163080	ADDI @ 0x0000002c	raw=0x16000313, pc_after=0x00000030, wb=x6=0x00000160, mem=None, flow=next
I40	167080	SW @ 0x00000030	raw=0x00432023, pc_after=0x00000034, wb=None, mem=Write Word @0x00000160 <- 0x00000109, flow=next
I41	171080	EBREAK @ 0x00000034	raw=0x00100073, pc_after=0x00000034, wb=None, mem=None, flow=next, halted=true

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