Program 22: Word copy and checksum¶
Program catalogue · Instruction reference · Executable reference
Purpose¶
Provide a mixed-memory workload that copies eight words while accumulating their checksum.
This is one of the six workload fixtures. This page specifies its instructions and architectural result; pipeline cycles, stalls, and throughput are implementation-specific and are not established by this reference run.
Setup¶
| Property | Value |
|---|---|
| Benchmark workload ID | program-22 |
| Headless selection | --program 22 |
| Visualizer scenario | rv32i-program22 |
| Registered test | RV32ISingleCycleSystemTest/program-22 |
| Instruction image | 12 words, starting at 0x00000000; last word at 0x0000002C |
| Initial state | PC = 0x00000000; all registers zero; neither halted nor trapped |
| Memories | Separate instruction and data memories, 256 KiB each; unlisted data bytes zero |
| Start address | Bytes, in increasing address order |
|---|---|
0x00000100 |
10 00 00 00 |
0x00000104 |
11 00 00 00 |
0x00000108 |
12 00 00 00 |
0x0000010C |
13 00 00 00 |
0x00000110 |
14 00 00 00 |
0x00000114 |
15 00 00 00 |
0x00000118 |
16 00 00 00 |
0x0000011C |
17 00 00 00 |
The table lists the complete preloaded data image, not instruction bytes. Data values use little-endian byte order.
| Register | Role established by the program |
|---|---|
x1 |
Next source word address |
x2 |
Next destination word address |
x3 |
Remaining word count |
x4 |
Checksum |
x5 |
Loaded word |
The shared setup describes reset, loading, and the behavioral-core selection. These hand-written programs do not use the standard ABI stack.
Assembly¶
Every instruction word is shown, including words that a trap or branch may prevent from executing. Address and word comments identify the exact fixture image.
addi x1, x0, 0x100 # 0x00000000 | 0x10000093
addi x2, x0, 0x180 # 0x00000004 | 0x18000113
addi x3, x0, 8 # 0x00000008 | 0x00800193
addi x4, x0, 0 # 0x0000000C | 0x00000213
loop:
lw x5, 0(x1) # 0x00000010 | 0x0000A283
sw x5, 0(x2) # 0x00000014 | 0x00512023
add x4, x4, x5 # 0x00000018 | 0x00520233
addi x1, x1, 4 # 0x0000001C | 0x00408093
addi x2, x2, 4 # 0x00000020 | 0x00410113
addi x3, x3, -1 # 0x00000024 | 0xFFF18193
bne x3, x0, loop # 0x00000028 | 0xFE0194E3
ebreak # 0x0000002C | 0x00100073
Execution¶
- Initialize source
0x100, destination0x180, count eight, and checksum zero. Input words are0x10through0x17(16 through 23). - Each pass loads one word, stores it to the destination, adds it to the checksum, advances both pointers by four bytes, decrements the count, and conditionally repeats.
- Eight copied words occupy
0x180–0x19F. The checksum is16 + ... + 23 = 156 = 0x9C. - Final pointers are
0x120and0x1A0; the count is zero. EBREAK makes4 + 8 × 7 + 1 = 61attempts.
The checksum remains in x4; the program does not store it after the copied array. Source bytes remain unchanged.
Expected result¶
These are the fixture's explicit final-state assertions. Unlisted registers are not implicitly zero; their values follow the assembly. The store table enumerates every written byte, including zero-valued writes.
| Item | Expected value | Meaning |
|---|---|---|
x1 |
0x00000120 |
Next source word address |
x2 |
0x000001A0 |
Next destination word address |
x3 |
0x00000000 |
Remaining word count |
x4 |
0x0000009C |
Checksum |
x5 |
0x00000017 |
Loaded word |
PC |
0x0000002C |
EBREAK address |
Attempts |
61 | Checkpoints I0–I60 |
HALTED |
1 | Project halt |
TRAPPED |
0 | No exception |
TRAP_CAUSE |
0 | None, a project enum code |
| Start address | Bytes, in increasing address order |
|---|---|
0x00000180 |
10 00 00 00 |
0x00000184 |
11 00 00 00 |
0x00000188 |
12 00 00 00 |
0x0000018C |
13 00 00 00 |
0x00000190 |
14 00 00 00 |
0x00000194 |
15 00 00 00 |
0x00000198 |
16 00 00 00 |
0x0000019C |
17 00 00 00 |
All data bytes not listed as written retain their initial values. This differs from Program 8's byte copy: pointers advance by four, and there is no separate checksum store.
Simulation and checkpoints¶
For a headless functional check, run build/rv32i_experiment --core single --program 22 --period 4000 --max-cycles 4096 --allocation-limit-mib 512. Select baseline or advanced for the same fixture on another core; add --fidelity reference for the structural-datapath reference profile. The explicit period is a scheduling choice, not a performance result. Use the campaign procedure for clock-certified measurements.
All 61 instruction attempts are included, with absolute simulator time and checkpoint number. The terminating EBREAK is included. The table is scrollable in both directions. Observation conventions distinguish these attempts from loaded word addresses and hardware cycles.
All 61 instruction-attempt checkpoints of RV32ISingleCycleSystemTest/program-22, with a behavioral core. Times are absolute simulator units, not milliseconds or an ISA latency.
| Checkpoint | Time | Instruction / address | Expected architectural effects |
|---|---|---|---|
| I0 | 7080 | ADDI @ 0x00000000 | raw=0x10000093, pc_after=0x00000004, wb=x1=0x00000100, mem=None, flow=next |
| I1 | 11080 | ADDI @ 0x00000004 | raw=0x18000113, pc_after=0x00000008, wb=x2=0x00000180, mem=None, flow=next |
| I2 | 15080 | ADDI @ 0x00000008 | raw=0x00800193, pc_after=0x0000000c, wb=x3=0x00000008, mem=None, flow=next |
| I3 | 19080 | ADDI @ 0x0000000c | raw=0x00000213, pc_after=0x00000010, wb=x4=0x00000000, mem=None, flow=next |
| I4 | 23080 | LW @ 0x00000010 | raw=0x0000a283, pc_after=0x00000014, wb=x5=0x00000010, mem=Read Word @0x00000100 -> 0x00000010, flow=next |
| I5 | 27080 | SW @ 0x00000014 | raw=0x00512023, pc_after=0x00000018, wb=None, mem=Write Word @0x00000180 <- 0x00000010, flow=next |
| I6 | 31080 | ADD @ 0x00000018 | raw=0x00520233, pc_after=0x0000001c, wb=x4=0x00000010, mem=None, flow=next |
| I7 | 35080 | ADDI @ 0x0000001c | raw=0x00408093, pc_after=0x00000020, wb=x1=0x00000104, mem=None, flow=next |
| I8 | 39080 | ADDI @ 0x00000020 | raw=0x00410113, pc_after=0x00000024, wb=x2=0x00000184, mem=None, flow=next |
| I9 | 43080 | ADDI @ 0x00000024 | raw=0xfff18193, pc_after=0x00000028, wb=x3=0x00000007, mem=None, flow=next |
| I10 | 47080 | BNE @ 0x00000028 | raw=0xfe0194e3, pc_after=0x00000010, wb=None, mem=None, branch=BNE taken=true |
| I11 | 51080 | LW @ 0x00000010 | raw=0x0000a283, pc_after=0x00000014, wb=x5=0x00000011, mem=Read Word @0x00000104 -> 0x00000011, flow=next |
| I12 | 55080 | SW @ 0x00000014 | raw=0x00512023, pc_after=0x00000018, wb=None, mem=Write Word @0x00000184 <- 0x00000011, flow=next |
| I13 | 59080 | ADD @ 0x00000018 | raw=0x00520233, pc_after=0x0000001c, wb=x4=0x00000021, mem=None, flow=next |
| I14 | 63080 | ADDI @ 0x0000001c | raw=0x00408093, pc_after=0x00000020, wb=x1=0x00000108, mem=None, flow=next |
| I15 | 67080 | ADDI @ 0x00000020 | raw=0x00410113, pc_after=0x00000024, wb=x2=0x00000188, mem=None, flow=next |
| I16 | 71080 | ADDI @ 0x00000024 | raw=0xfff18193, pc_after=0x00000028, wb=x3=0x00000006, mem=None, flow=next |
| I17 | 75080 | BNE @ 0x00000028 | raw=0xfe0194e3, pc_after=0x00000010, wb=None, mem=None, branch=BNE taken=true |
| I18 | 79080 | LW @ 0x00000010 | raw=0x0000a283, pc_after=0x00000014, wb=x5=0x00000012, mem=Read Word @0x00000108 -> 0x00000012, flow=next |
| I19 | 83080 | SW @ 0x00000014 | raw=0x00512023, pc_after=0x00000018, wb=None, mem=Write Word @0x00000188 <- 0x00000012, flow=next |
| I20 | 87080 | ADD @ 0x00000018 | raw=0x00520233, pc_after=0x0000001c, wb=x4=0x00000033, mem=None, flow=next |
| I21 | 91080 | ADDI @ 0x0000001c | raw=0x00408093, pc_after=0x00000020, wb=x1=0x0000010c, mem=None, flow=next |
| I22 | 95080 | ADDI @ 0x00000020 | raw=0x00410113, pc_after=0x00000024, wb=x2=0x0000018c, mem=None, flow=next |
| I23 | 99080 | ADDI @ 0x00000024 | raw=0xfff18193, pc_after=0x00000028, wb=x3=0x00000005, mem=None, flow=next |
| I24 | 103080 | BNE @ 0x00000028 | raw=0xfe0194e3, pc_after=0x00000010, wb=None, mem=None, branch=BNE taken=true |
| I25 | 107080 | LW @ 0x00000010 | raw=0x0000a283, pc_after=0x00000014, wb=x5=0x00000013, mem=Read Word @0x0000010c -> 0x00000013, flow=next |
| I26 | 111080 | SW @ 0x00000014 | raw=0x00512023, pc_after=0x00000018, wb=None, mem=Write Word @0x0000018c <- 0x00000013, flow=next |
| I27 | 115080 | ADD @ 0x00000018 | raw=0x00520233, pc_after=0x0000001c, wb=x4=0x00000046, mem=None, flow=next |
| I28 | 119080 | ADDI @ 0x0000001c | raw=0x00408093, pc_after=0x00000020, wb=x1=0x00000110, mem=None, flow=next |
| I29 | 123080 | ADDI @ 0x00000020 | raw=0x00410113, pc_after=0x00000024, wb=x2=0x00000190, mem=None, flow=next |
| I30 | 127080 | ADDI @ 0x00000024 | raw=0xfff18193, pc_after=0x00000028, wb=x3=0x00000004, mem=None, flow=next |
| I31 | 131080 | BNE @ 0x00000028 | raw=0xfe0194e3, pc_after=0x00000010, wb=None, mem=None, branch=BNE taken=true |
| I32 | 135080 | LW @ 0x00000010 | raw=0x0000a283, pc_after=0x00000014, wb=x5=0x00000014, mem=Read Word @0x00000110 -> 0x00000014, flow=next |
| I33 | 139080 | SW @ 0x00000014 | raw=0x00512023, pc_after=0x00000018, wb=None, mem=Write Word @0x00000190 <- 0x00000014, flow=next |
| I34 | 143080 | ADD @ 0x00000018 | raw=0x00520233, pc_after=0x0000001c, wb=x4=0x0000005a, mem=None, flow=next |
| I35 | 147080 | ADDI @ 0x0000001c | raw=0x00408093, pc_after=0x00000020, wb=x1=0x00000114, mem=None, flow=next |
| I36 | 151080 | ADDI @ 0x00000020 | raw=0x00410113, pc_after=0x00000024, wb=x2=0x00000194, mem=None, flow=next |
| I37 | 155080 | ADDI @ 0x00000024 | raw=0xfff18193, pc_after=0x00000028, wb=x3=0x00000003, mem=None, flow=next |
| I38 | 159080 | BNE @ 0x00000028 | raw=0xfe0194e3, pc_after=0x00000010, wb=None, mem=None, branch=BNE taken=true |
| I39 | 163080 | LW @ 0x00000010 | raw=0x0000a283, pc_after=0x00000014, wb=x5=0x00000015, mem=Read Word @0x00000114 -> 0x00000015, flow=next |
| I40 | 167080 | SW @ 0x00000014 | raw=0x00512023, pc_after=0x00000018, wb=None, mem=Write Word @0x00000194 <- 0x00000015, flow=next |
| I41 | 171080 | ADD @ 0x00000018 | raw=0x00520233, pc_after=0x0000001c, wb=x4=0x0000006f, mem=None, flow=next |
| I42 | 175080 | ADDI @ 0x0000001c | raw=0x00408093, pc_after=0x00000020, wb=x1=0x00000118, mem=None, flow=next |
| I43 | 179080 | ADDI @ 0x00000020 | raw=0x00410113, pc_after=0x00000024, wb=x2=0x00000198, mem=None, flow=next |
| I44 | 183080 | ADDI @ 0x00000024 | raw=0xfff18193, pc_after=0x00000028, wb=x3=0x00000002, mem=None, flow=next |
| I45 | 187080 | BNE @ 0x00000028 | raw=0xfe0194e3, pc_after=0x00000010, wb=None, mem=None, branch=BNE taken=true |
| I46 | 191080 | LW @ 0x00000010 | raw=0x0000a283, pc_after=0x00000014, wb=x5=0x00000016, mem=Read Word @0x00000118 -> 0x00000016, flow=next |
| I47 | 195080 | SW @ 0x00000014 | raw=0x00512023, pc_after=0x00000018, wb=None, mem=Write Word @0x00000198 <- 0x00000016, flow=next |
| I48 | 199080 | ADD @ 0x00000018 | raw=0x00520233, pc_after=0x0000001c, wb=x4=0x00000085, mem=None, flow=next |
| I49 | 203080 | ADDI @ 0x0000001c | raw=0x00408093, pc_after=0x00000020, wb=x1=0x0000011c, mem=None, flow=next |
| I50 | 207080 | ADDI @ 0x00000020 | raw=0x00410113, pc_after=0x00000024, wb=x2=0x0000019c, mem=None, flow=next |
| I51 | 211080 | ADDI @ 0x00000024 | raw=0xfff18193, pc_after=0x00000028, wb=x3=0x00000001, mem=None, flow=next |
| I52 | 215080 | BNE @ 0x00000028 | raw=0xfe0194e3, pc_after=0x00000010, wb=None, mem=None, branch=BNE taken=true |
| I53 | 219080 | LW @ 0x00000010 | raw=0x0000a283, pc_after=0x00000014, wb=x5=0x00000017, mem=Read Word @0x0000011c -> 0x00000017, flow=next |
| I54 | 223080 | SW @ 0x00000014 | raw=0x00512023, pc_after=0x00000018, wb=None, mem=Write Word @0x0000019c <- 0x00000017, flow=next |
| I55 | 227080 | ADD @ 0x00000018 | raw=0x00520233, pc_after=0x0000001c, wb=x4=0x0000009c, mem=None, flow=next |
| I56 | 231080 | ADDI @ 0x0000001c | raw=0x00408093, pc_after=0x00000020, wb=x1=0x00000120, mem=None, flow=next |
| I57 | 235080 | ADDI @ 0x00000020 | raw=0x00410113, pc_after=0x00000024, wb=x2=0x000001a0, mem=None, flow=next |
| I58 | 239080 | ADDI @ 0x00000024 | raw=0xfff18193, pc_after=0x00000028, wb=x3=0x00000000, mem=None, flow=next |
| I59 | 243080 | BNE @ 0x00000028 | raw=0xfe0194e3, pc_after=0x0000002c, wb=None, mem=None, branch=BNE taken=false |
| I60 | 247080 | EBREAK @ 0x0000002c | raw=0x00100073, pc_after=0x0000002c, wb=None, mem=None, flow=next, halted=true |