Program 21: Sixteen-word array sum

Program catalogue · Instruction reference · Executable reference

Purpose

Provide a scalar array-sum workload combining a load-use dependency, address updates, a counter, and loop branches.

This is one of the six workload fixtures. This page specifies its instructions and architectural result; pipeline cycles, stalls, and throughput are implementation-specific and are not established by this reference run.

Setup

Property	Value
Benchmark workload ID	program-21
Headless selection	--program 21
Visualizer scenario	rv32i-program21
Registered test	RV32ISingleCycleSystemTest/program-21
Instruction image	9 words, starting at 0x00000000; last word at 0x00000020
Initial state	PC = 0x00000000; all registers zero; neither halted nor trapped
Memories	Separate instruction and data memories, 256 KiB each; unlisted data bytes zero

Start address	Bytes, in increasing address order
0x00000100	01 00 00 00
0x00000104	02 00 00 00
0x00000108	03 00 00 00
0x0000010C	04 00 00 00
0x00000110	05 00 00 00
0x00000114	06 00 00 00
0x00000118	07 00 00 00
0x0000011C	08 00 00 00
0x00000120	09 00 00 00
0x00000124	0A 00 00 00
0x00000128	0B 00 00 00
0x0000012C	0C 00 00 00
0x00000130	0D 00 00 00
0x00000134	0E 00 00 00
0x00000138	0F 00 00 00
0x0000013C	10 00 00 00

The table lists the complete preloaded data image, not instruction bytes. Data values use little-endian byte order.

Register	Role established by the program
x1	Next input word address
x2	Remaining word count
x3	Sum
x4	Loaded word

The shared setup describes reset, loading, and the behavioral-core selection. These hand-written programs do not use the standard ABI stack.

Assembly

Every instruction word is shown, including words that a trap or branch may prevent from executing. Address and word comments identify the exact fixture image.

addi x1, x0, 0x100             # 0x00000000 | 0x10000093
addi x2, x0, 16                # 0x00000004 | 0x01000113
addi x3, x0, 0                 # 0x00000008 | 0x00000193
loop:
lw x4, 0(x1)                   # 0x0000000C | 0x0000A203
add x3, x3, x4                 # 0x00000010 | 0x004181B3
addi x1, x1, 4                 # 0x00000014 | 0x00408093
addi x2, x2, -1                # 0x00000018 | 0xFFF10113
bne x2, x0, loop               # 0x0000001C | 0xFE0118E3
ebreak                         # 0x00000020 | 0x00100073

Execution

1. Initialize source 0x100, count sixteen, and sum zero. Input words are the integers 1 through 16.
2. Each pass loads one word, immediately adds it to the sum, advances the source by four bytes, decrements the count, and conditionally repeats.
3. The sum is 16 × 17 / 2 = 136; the last loaded value is 16 and the source ends at 0x140.
4. EBREAK ends 3 + 16 × 5 + 1 = 84 attempts. The branch is taken fifteen times.

Unlike Program 1, this fixture has no result stores. Its sum stays in x3, and the input memory is unchanged.

Expected result

These are the fixture's explicit final-state assertions. Unlisted registers are not implicitly zero; their values follow the assembly. The store table enumerates every written byte, including zero-valued writes.

Item	Expected value	Meaning
x1	0x00000140	Next input word address
x2	0x00000000	Remaining word count
x3	0x00000088	Sum
x4	0x00000010	Loaded word
PC	0x00000020	EBREAK address
Attempts	84	Checkpoints I0–I83
HALTED	1	Project halt
TRAPPED	0	No exception
TRAP_CAUSE	0	None, a project enum code

Start address	Bytes, in increasing address order
None	—

No data writes occur; the initial data image is unchanged. The result is observed through architectural registers, not through an output buffer.

Simulation and checkpoints

For a headless functional check, run build/rv32i_experiment --core single --program 21 --period 4000 --max-cycles 4096 --allocation-limit-mib 512. Select baseline or advanced for the same fixture on another core; add --fidelity reference for the structural-datapath reference profile. The explicit period is a scheduling choice, not a performance result. Use the campaign procedure for clock-certified measurements.

All 84 instruction attempts are included, with absolute simulator time and checkpoint number. The terminating EBREAK is included. The table is scrollable in both directions. Observation conventions distinguish these attempts from loaded word addresses and hardware cycles.

All 84 instruction-attempt checkpoints of RV32ISingleCycleSystemTest/program-21, with a behavioral core. Times are absolute simulator units, not milliseconds or an ISA latency.

Checkpoint	Time	Instruction / address	Expected architectural effects
I0	7080	ADDI @ 0x00000000	raw=0x10000093, pc_after=0x00000004, wb=x1=0x00000100, mem=None, flow=next
I1	11080	ADDI @ 0x00000004	raw=0x01000113, pc_after=0x00000008, wb=x2=0x00000010, mem=None, flow=next
I2	15080	ADDI @ 0x00000008	raw=0x00000193, pc_after=0x0000000c, wb=x3=0x00000000, mem=None, flow=next
I3	19080	LW @ 0x0000000c	raw=0x0000a203, pc_after=0x00000010, wb=x4=0x00000001, mem=Read Word @0x00000100 -> 0x00000001, flow=next
I4	23080	ADD @ 0x00000010	raw=0x004181b3, pc_after=0x00000014, wb=x3=0x00000001, mem=None, flow=next
I5	27080	ADDI @ 0x00000014	raw=0x00408093, pc_after=0x00000018, wb=x1=0x00000104, mem=None, flow=next
I6	31080	ADDI @ 0x00000018	raw=0xfff10113, pc_after=0x0000001c, wb=x2=0x0000000f, mem=None, flow=next
I7	35080	BNE @ 0x0000001c	raw=0xfe0118e3, pc_after=0x0000000c, wb=None, mem=None, branch=BNE taken=true
I8	39080	LW @ 0x0000000c	raw=0x0000a203, pc_after=0x00000010, wb=x4=0x00000002, mem=Read Word @0x00000104 -> 0x00000002, flow=next
I9	43080	ADD @ 0x00000010	raw=0x004181b3, pc_after=0x00000014, wb=x3=0x00000003, mem=None, flow=next
I10	47080	ADDI @ 0x00000014	raw=0x00408093, pc_after=0x00000018, wb=x1=0x00000108, mem=None, flow=next
I11	51080	ADDI @ 0x00000018	raw=0xfff10113, pc_after=0x0000001c, wb=x2=0x0000000e, mem=None, flow=next
I12	55080	BNE @ 0x0000001c	raw=0xfe0118e3, pc_after=0x0000000c, wb=None, mem=None, branch=BNE taken=true
I13	59080	LW @ 0x0000000c	raw=0x0000a203, pc_after=0x00000010, wb=x4=0x00000003, mem=Read Word @0x00000108 -> 0x00000003, flow=next
I14	63080	ADD @ 0x00000010	raw=0x004181b3, pc_after=0x00000014, wb=x3=0x00000006, mem=None, flow=next
I15	67080	ADDI @ 0x00000014	raw=0x00408093, pc_after=0x00000018, wb=x1=0x0000010c, mem=None, flow=next
I16	71080	ADDI @ 0x00000018	raw=0xfff10113, pc_after=0x0000001c, wb=x2=0x0000000d, mem=None, flow=next
I17	75080	BNE @ 0x0000001c	raw=0xfe0118e3, pc_after=0x0000000c, wb=None, mem=None, branch=BNE taken=true
I18	79080	LW @ 0x0000000c	raw=0x0000a203, pc_after=0x00000010, wb=x4=0x00000004, mem=Read Word @0x0000010c -> 0x00000004, flow=next
I19	83080	ADD @ 0x00000010	raw=0x004181b3, pc_after=0x00000014, wb=x3=0x0000000a, mem=None, flow=next
I20	87080	ADDI @ 0x00000014	raw=0x00408093, pc_after=0x00000018, wb=x1=0x00000110, mem=None, flow=next
I21	91080	ADDI @ 0x00000018	raw=0xfff10113, pc_after=0x0000001c, wb=x2=0x0000000c, mem=None, flow=next
I22	95080	BNE @ 0x0000001c	raw=0xfe0118e3, pc_after=0x0000000c, wb=None, mem=None, branch=BNE taken=true
I23	99080	LW @ 0x0000000c	raw=0x0000a203, pc_after=0x00000010, wb=x4=0x00000005, mem=Read Word @0x00000110 -> 0x00000005, flow=next
I24	103080	ADD @ 0x00000010	raw=0x004181b3, pc_after=0x00000014, wb=x3=0x0000000f, mem=None, flow=next
I25	107080	ADDI @ 0x00000014	raw=0x00408093, pc_after=0x00000018, wb=x1=0x00000114, mem=None, flow=next
I26	111080	ADDI @ 0x00000018	raw=0xfff10113, pc_after=0x0000001c, wb=x2=0x0000000b, mem=None, flow=next
I27	115080	BNE @ 0x0000001c	raw=0xfe0118e3, pc_after=0x0000000c, wb=None, mem=None, branch=BNE taken=true
I28	119080	LW @ 0x0000000c	raw=0x0000a203, pc_after=0x00000010, wb=x4=0x00000006, mem=Read Word @0x00000114 -> 0x00000006, flow=next
I29	123080	ADD @ 0x00000010	raw=0x004181b3, pc_after=0x00000014, wb=x3=0x00000015, mem=None, flow=next
I30	127080	ADDI @ 0x00000014	raw=0x00408093, pc_after=0x00000018, wb=x1=0x00000118, mem=None, flow=next
I31	131080	ADDI @ 0x00000018	raw=0xfff10113, pc_after=0x0000001c, wb=x2=0x0000000a, mem=None, flow=next
I32	135080	BNE @ 0x0000001c	raw=0xfe0118e3, pc_after=0x0000000c, wb=None, mem=None, branch=BNE taken=true
I33	139080	LW @ 0x0000000c	raw=0x0000a203, pc_after=0x00000010, wb=x4=0x00000007, mem=Read Word @0x00000118 -> 0x00000007, flow=next
I34	143080	ADD @ 0x00000010	raw=0x004181b3, pc_after=0x00000014, wb=x3=0x0000001c, mem=None, flow=next
I35	147080	ADDI @ 0x00000014	raw=0x00408093, pc_after=0x00000018, wb=x1=0x0000011c, mem=None, flow=next
I36	151080	ADDI @ 0x00000018	raw=0xfff10113, pc_after=0x0000001c, wb=x2=0x00000009, mem=None, flow=next
I37	155080	BNE @ 0x0000001c	raw=0xfe0118e3, pc_after=0x0000000c, wb=None, mem=None, branch=BNE taken=true
I38	159080	LW @ 0x0000000c	raw=0x0000a203, pc_after=0x00000010, wb=x4=0x00000008, mem=Read Word @0x0000011c -> 0x00000008, flow=next
I39	163080	ADD @ 0x00000010	raw=0x004181b3, pc_after=0x00000014, wb=x3=0x00000024, mem=None, flow=next
I40	167080	ADDI @ 0x00000014	raw=0x00408093, pc_after=0x00000018, wb=x1=0x00000120, mem=None, flow=next
I41	171080	ADDI @ 0x00000018	raw=0xfff10113, pc_after=0x0000001c, wb=x2=0x00000008, mem=None, flow=next
I42	175080	BNE @ 0x0000001c	raw=0xfe0118e3, pc_after=0x0000000c, wb=None, mem=None, branch=BNE taken=true
I43	179080	LW @ 0x0000000c	raw=0x0000a203, pc_after=0x00000010, wb=x4=0x00000009, mem=Read Word @0x00000120 -> 0x00000009, flow=next
I44	183080	ADD @ 0x00000010	raw=0x004181b3, pc_after=0x00000014, wb=x3=0x0000002d, mem=None, flow=next
I45	187080	ADDI @ 0x00000014	raw=0x00408093, pc_after=0x00000018, wb=x1=0x00000124, mem=None, flow=next
I46	191080	ADDI @ 0x00000018	raw=0xfff10113, pc_after=0x0000001c, wb=x2=0x00000007, mem=None, flow=next
I47	195080	BNE @ 0x0000001c	raw=0xfe0118e3, pc_after=0x0000000c, wb=None, mem=None, branch=BNE taken=true
I48	199080	LW @ 0x0000000c	raw=0x0000a203, pc_after=0x00000010, wb=x4=0x0000000a, mem=Read Word @0x00000124 -> 0x0000000a, flow=next
I49	203080	ADD @ 0x00000010	raw=0x004181b3, pc_after=0x00000014, wb=x3=0x00000037, mem=None, flow=next
I50	207080	ADDI @ 0x00000014	raw=0x00408093, pc_after=0x00000018, wb=x1=0x00000128, mem=None, flow=next
I51	211080	ADDI @ 0x00000018	raw=0xfff10113, pc_after=0x0000001c, wb=x2=0x00000006, mem=None, flow=next
I52	215080	BNE @ 0x0000001c	raw=0xfe0118e3, pc_after=0x0000000c, wb=None, mem=None, branch=BNE taken=true
I53	219080	LW @ 0x0000000c	raw=0x0000a203, pc_after=0x00000010, wb=x4=0x0000000b, mem=Read Word @0x00000128 -> 0x0000000b, flow=next
I54	223080	ADD @ 0x00000010	raw=0x004181b3, pc_after=0x00000014, wb=x3=0x00000042, mem=None, flow=next
I55	227080	ADDI @ 0x00000014	raw=0x00408093, pc_after=0x00000018, wb=x1=0x0000012c, mem=None, flow=next
I56	231080	ADDI @ 0x00000018	raw=0xfff10113, pc_after=0x0000001c, wb=x2=0x00000005, mem=None, flow=next
I57	235080	BNE @ 0x0000001c	raw=0xfe0118e3, pc_after=0x0000000c, wb=None, mem=None, branch=BNE taken=true
I58	239080	LW @ 0x0000000c	raw=0x0000a203, pc_after=0x00000010, wb=x4=0x0000000c, mem=Read Word @0x0000012c -> 0x0000000c, flow=next
I59	243080	ADD @ 0x00000010	raw=0x004181b3, pc_after=0x00000014, wb=x3=0x0000004e, mem=None, flow=next
I60	247080	ADDI @ 0x00000014	raw=0x00408093, pc_after=0x00000018, wb=x1=0x00000130, mem=None, flow=next
I61	251080	ADDI @ 0x00000018	raw=0xfff10113, pc_after=0x0000001c, wb=x2=0x00000004, mem=None, flow=next
I62	255080	BNE @ 0x0000001c	raw=0xfe0118e3, pc_after=0x0000000c, wb=None, mem=None, branch=BNE taken=true
I63	259080	LW @ 0x0000000c	raw=0x0000a203, pc_after=0x00000010, wb=x4=0x0000000d, mem=Read Word @0x00000130 -> 0x0000000d, flow=next
I64	263080	ADD @ 0x00000010	raw=0x004181b3, pc_after=0x00000014, wb=x3=0x0000005b, mem=None, flow=next
I65	267080	ADDI @ 0x00000014	raw=0x00408093, pc_after=0x00000018, wb=x1=0x00000134, mem=None, flow=next
I66	271080	ADDI @ 0x00000018	raw=0xfff10113, pc_after=0x0000001c, wb=x2=0x00000003, mem=None, flow=next
I67	275080	BNE @ 0x0000001c	raw=0xfe0118e3, pc_after=0x0000000c, wb=None, mem=None, branch=BNE taken=true
I68	279080	LW @ 0x0000000c	raw=0x0000a203, pc_after=0x00000010, wb=x4=0x0000000e, mem=Read Word @0x00000134 -> 0x0000000e, flow=next
I69	283080	ADD @ 0x00000010	raw=0x004181b3, pc_after=0x00000014, wb=x3=0x00000069, mem=None, flow=next
I70	287080	ADDI @ 0x00000014	raw=0x00408093, pc_after=0x00000018, wb=x1=0x00000138, mem=None, flow=next
I71	291080	ADDI @ 0x00000018	raw=0xfff10113, pc_after=0x0000001c, wb=x2=0x00000002, mem=None, flow=next
I72	295080	BNE @ 0x0000001c	raw=0xfe0118e3, pc_after=0x0000000c, wb=None, mem=None, branch=BNE taken=true
I73	299080	LW @ 0x0000000c	raw=0x0000a203, pc_after=0x00000010, wb=x4=0x0000000f, mem=Read Word @0x00000138 -> 0x0000000f, flow=next
I74	303080	ADD @ 0x00000010	raw=0x004181b3, pc_after=0x00000014, wb=x3=0x00000078, mem=None, flow=next
I75	307080	ADDI @ 0x00000014	raw=0x00408093, pc_after=0x00000018, wb=x1=0x0000013c, mem=None, flow=next
I76	311080	ADDI @ 0x00000018	raw=0xfff10113, pc_after=0x0000001c, wb=x2=0x00000001, mem=None, flow=next
I77	315080	BNE @ 0x0000001c	raw=0xfe0118e3, pc_after=0x0000000c, wb=None, mem=None, branch=BNE taken=true
I78	319080	LW @ 0x0000000c	raw=0x0000a203, pc_after=0x00000010, wb=x4=0x00000010, mem=Read Word @0x0000013c -> 0x00000010, flow=next
I79	323080	ADD @ 0x00000010	raw=0x004181b3, pc_after=0x00000014, wb=x3=0x00000088, mem=None, flow=next
I80	327080	ADDI @ 0x00000014	raw=0x00408093, pc_after=0x00000018, wb=x1=0x00000140, mem=None, flow=next
I81	331080	ADDI @ 0x00000018	raw=0xfff10113, pc_after=0x0000001c, wb=x2=0x00000000, mem=None, flow=next
I82	335080	BNE @ 0x0000001c	raw=0xfe0118e3, pc_after=0x00000020, wb=None, mem=None, branch=BNE taken=false
I83	339080	EBREAK @ 0x00000020	raw=0x00100073, pc_after=0x00000020, wb=None, mem=None, flow=next, halted=true

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